25 Jun 1995

Hardware Initialization

When a PC is powered on, the CPU is reset and begins executing a set of instructions stored in some kind of read-only memory (ROM) on the system board. These instructions are divided in three parts: The Power On Self Test (POST) which is run only after the power is turned on, the Initialization logic run every time the user reboots with Cntrl-Alt-Del, and the Basic I/O Support (BIOS) used by DOS to access standard devices. Traditionally, read-only memory was based on chips that were programmed at the factory. A new generation of computers contain Flash Memory that can be reprogrammed from a floppy disk. Some other systems read POST/Initialization/BIOS instructions off a special area of the hard disk.

Read-Only memory chips deliver information only one byte at a time, so they are slower than normal memory. Since the BIOS code will be used while DOS is running, most systems begin by copying the contents of ROM to an area of the standard memory chips. This reduces the amount of RAM memory that is reported as available for operating systems and applications.

     8068K OK

The most visible consequence of the Power On Self Test (POST) for the end user is the memory test, where a number appears in the upper left corner of the screen and counts up until it reaches the total amount of memory (less the shadow area) installed on the machine. However, a number of other less visible checks are also occurring. Before anything can appear, the display adapter must be initialized. It must be set to the correct resolution and refresh rate. The hard disks must be powered up and come to operating speed. The keyboard and mouse ports are tested. If all items check out, a single "beep" is generated and the PC continues booting. Any problems are reported with multiple beeps and an error code or message on the screen.

RAM memory is installed in the machine as a row of SIMMs. Memory comes in some number of megabytes. However, the original PC architecture requires the Chip Set to open up a "gap" by logically moving memory after the 640K address to the one megabyte address. No memory is lost, the memory controller simply moves all the addresses up by 384K. The gap is divided into three 128K areas. The first area provides a "window" used to send data or commands to the display adapter. The middle 128K of addresses are mapped to adapter cards plugged into the I/O bus. The last 128K are reserved for the BIOS instructions in the shadowed ROM.

Adapter cards on the I/O bus can be configured to present an initialization program in ROM memory somewhere in the middle 128K of free addresses. In hex , these addresses are represented as C0000 to DFFFF. Each time the system is initialized, the POST program scans this area for initialization programs and runs any that it finds. This mechanism allows the display adapter to initialize itself properly (no matter which vendor or model of adapter card you own). Code on the SCSI card makes up to two SCSI disks visible and usable to DOS programs. Code on the LAN adapter will boot a diskless workstation from a LAN server.

So at the end of the initialization programs supplied by ROM memory (either on the mainboard or on the adapter cards) the system has located and initialized the adapter cards and counted all the hard disks and started them spinning. Booting from a LAN Server is current beyond the scope of this document. Assume that there is at least one hard disk.

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